Memory and Storage Questions and Answers
Memory and Storage Questions with Answers are an integral part of digital electronics aptitude and technical competitive exams. This topic focuses on types of memories—RAM, ROM, Cache, and Flash—and their roles in data processing and system performance. Students preparing for GATE, ISRO, DRDO, or PSU exams often encounter questions that test conceptual understanding of primary vs. secondary storage, memory hierarchy, and data access methods. Practicing aptitude questions with solutions PDF on Memory and Storage helps learners build strong analytical reasoning about digital systems. These aptitude-based problems come with detailed explanations to strengthen your conceptual clarity and enhance speed during exams. Start your aptitude test practice online to confidently solve memory and storage-related questions in any electronics or computer engineering placement test.
Memory and Storage
81. Which of the following describes the action of storing a bit of data in a mask ROM?
- A 1 is stored in a bipolar cell by opening the base connection to the address line.
- A 0 is stored in a bipolar cell by shorting the base connection to the address line.
- A 1 is stored by connecting the gate of a MOS cell to the address line.
- A 0 is stored by connecting the gate of a MOS cell to the address line.
82. Address decoding for dynamic memory chip control may also be used for:
- controlling refresh circuits
- read and write control
- chip selection and address location
- memory mapping
84. Static RAMs (SRAMs) use internal capacitors as basic storage elements.
- TRUE
- FALSE
85. A burst refresh and a normal memory operation of a DRAM can be interspersed.
- TRUE
- FALSE
86. ROMs are used to store data that generally cannot be easily changed.
- TRUE
- FALSE
88. If a memory design allows a storage location to be accessed without first sequencing through other locations, it is called Random Access Memory.
- TRUE
- FALSE
90. The address-decoding scheme for a 16K-byte EPROM memory system requires a 1-to-8-address decoder when 4K × 8 memory is used.
- TRUE
- FALSE